In non-volatile FLASH memory devices, the erase operation is a destructive operation in the sense that it leads to a loss of information and involves a whole sector. The program operation involves recording information, and generally takes place by writing a byte, word or a similar unitary piece of information at the time. There are particular cases in which it is necessary to program a large number of words. For example, during a test phase for simultaneously stressing as many cells as possible, or in a user mode after having erased a sector for recovering as many depleted cells as possible.
Generally, this is an operation that may cause problems. For instance, if the number of bitlines to be simultaneously programmed is very large, the current absorption may exceed the internal charge pump generator capabilities. An approach that is normally adopted involves setting a reasonable number of bitlines to be programmed simultaneously such that the cumulative current to be absorbed can be adequately delivered by the charge pump generator.
A typical algorithm for carrying out this operation is highlighted in FIG. 1. With the variable N being the number of simultaneously programmable bitlines, and with M*N being the total number of bitlines of the sector that is to be programmed, the following steps are carried out: N bitlines are programmed at a time; the program operation is repeated on the same word of N bitlines as long as the operation is verified to be successfully completed; and the above steps are repeated M times.
An attempt to program a first group of NMAX memory cells (SET N=NMAX) is carried out. The fact that it is a first attempt (TENT=1) to program the word is recorded, and a program operation is initiated (Program). Once the program operation has ended, the word of NMAX cells is verified for checking whether it has been correctly programmed (DATO=OK?). If a first verification fails, this process is repeated (TENT=TENT+1) for a number of times equal to a pre-established maximum number of attempts (TENT=MAX). If this latter condition is verified, the programming algorithm is stopped for signaling that the memory location contains failing cells (FAIL).
If all NMAX cells of the first group have been programmed correctly (DATO=OK?), it is checked whether the last groups (or word) of NMAX cells has been reached (LAST_ADD?), and if so, the program operation is terminated. Otherwise, the successive group of NMAX cells (ADD=ADD+1) is selected and the same sequence of steps as specified above is repeated.
Simultaneous programming is effective if the number of iterations required equals the minimum number of iterations
            N      ·      M              N      MAX        .The above described method has the following drawbacks. The number N of bitlines to be programmed simultaneously is established based on past experience and on the knowledge of the fabrication process used. In general, it is very difficult to establish a priori a tolerable maximum number N for a simple memory device, or for the devices on the same wafer, or even for a lot of wafers.
Another drawback is that in general, because of the difficulty to know exactly the number N, the number N is either underestimated or overestimated. If the number N is underestimated, too few bitlines are programmed at the time, and the number of iterations required for programming all the bitlines is increased. If the number N is overestimated because of the above mentioned overload situation, there are two consequences.
A first consequence is that the program operation is started in any case. For successfully programming each group of N bitlines, the number of program-verify iterations becomes relatively large. As a matter of fact, the advantage of speeding up the program operation by increasing the number N of bitlines to be programmed at the same time is jeopardized by weakened program steps.
A second consequence is that the programming of a group of N bitlines is never achieved. This is because typically, when the program-verify algorithm has been repeated for a set maximum number of attempts, a fail is flagged during the test mode, or a system error flag is generated during a used mode.
Therefore, the problem appears to be significant: maximizing the number of cells that are simultaneously programmed saves time. However, if the number of bitlines N is set too large, the programming may never be correctly completed.
Published U.S. Patent Application No. 2004/0130946 discloses a method for simultaneously programming more bitlines of a FLASH memory. According to this method, a certain number of bitlines are simultaneously programmed, then it is checked whether the programming of these bitlines has been carried out correctly. If this condition is not verified, the number of bitlines to be simultaneously programmed is decremented, and the program operation is carried out again.
A drawback of this method is that for establishing whether too many bitlines at the time are being programmed, it is necessary to program a group of bitlines and then, after the program operation is terminated, to verify whether they have been correctly programmed or not. Even this method is more convenient than other known methods, wherein the number of bitlines to be programmed simultaneously is pre-established. Nonetheless, this method for programming a FLASH memory is not significantly shortened.